On line self recovery of embedded multi-core SOC on FPGA using dynamic partial reconfiguration
U. Legat, A. Biasizzo, F. Novak
Information technology and control, 2012, 41(2): 116-124
This paper proposes an error recovery method for FPGA Systems On Chip (SOC) with multiple processor cores. This method is effective against soft errors in the configuration memory (i.e., the errors caused by high energy radiation also known as Single Event Upsets). The system tests itself without a visible downtime to the end user. The recovery algorithm checks the configuration memory of the SRAM based FPGA through the internal configuration access port and repairs the faulty configuration bits through partial reconfiguration.
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