The review of some data flow computer architectures
J. Šilc, B. Robič
Informatica, 1987, 11(1): 61-66
The article reviews some selected data flow architectures. All the architectures are designed for VLSI implementation to provide large throughput, low power consumption, and reduced size and weight. While some are in the phase of simulation and VLSI chip floor-plan construction the others already exhibit real VLSI implementation.
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