Chip multiprocessors - a cost-effective alternative to simultaneous multithreading
B. Robič, J. Šilc, T. Ungerer
WSES Press, 2001, 396-401
In this paper we describe the principles of the chip multiprocessor architecture, overview design alternatives and present some example processors of this type. We discuss the results of several simulations where chip multiprocessor was compared to other advanced processor architectures including superscalars and simultaneous multithreading processors. Although simultaneous multithreading seems to be most efficient when compared architectures have equal total issue bandwidth, chip multiprocessor may outperform simultaneous multithreading when implemented with equal number of transistors.
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