In this paper we present a new evolutionary algorithm, developed for scheduling and allocation in the automatic integrated circuit synthesis. It involves the scheduling of the operations and resource allocation for logic circuit design, with the object of speeding up the whole design process. The first part of the paper presents the design optimization algorithm and its main functions, while in the second part the algorithm is compared with some other scheduling algorithms. The evaluation with cost factors, relating execution time and resource utilization, is made through different benchmark examples and various scheduling algorithms. We found that this evolutionary approach made the best or at least promissing solutions in all tests and is therefore very appropriate for use in the automatic circuit design.