Towards Deploying Highly Quantized Neural Networks on FPGA Using Chisel
Jure Vreča, Anton Biasizzo
2023 26th Euromicro Conference on Digital System Design (DSD) DSD
Durres, Albania, 6-8 September, 2023
We present chisel4ml, a Chisel-based tool that generates hardware for highly quantized neural networks described in QKeras. Such networks typically use parameters with bitwidths less than 8 bits and may have pruned connections. Chisel4ml can generate the highly quantized neural network as a single combinational circuit with pipeline registers in between the different layers. It supports heterogeneous quantization where each layer can have a different precision. The full parallelization enables very low-latency and high throughput inference, that are required for certain tasks. We illustrate this on the triggering system for the CERN Large Hadron Collider, which filters out events of interest and sends them on for further processing. We compare our tool against hls4ml, a high-level synthesis based approach for deploying similar neural networks. Chisel4ml is still under development. However, it already achieves comparable results to hls4ml for some neural network architectures. Chisel4ml is available on
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