An evolutionary technique for scheduling and allocation concurrency
G. Papa
WSEAS Transactions on Systems, 2004, 3(3): 1039-1044
This paper presents a method with an evolutionary approach to some of the tasks of integrated-circuit (IC) design. Nowadays, high-level synthesis tools are able to build competitive and reliable ICs in an acceptable design time. The work is focused on application-specific integrated circuits (ASICs) that need an even more sophisticated design (in term of size and speed) due to their specific use. Optimally scheduled operations are not necessarily optimally allocated to the units. To enable optimal allocation we need to consider some allocation criteria while the scheduling is being done. Therefore, algorithms with concurrent scheduling and allocation produce the best results. However, these algorithms are also timeconsuming. It is obvious that we have to deal with a trade-off between the quality of the solution and its design time. An algorithm might be fast, but its solutions will not be as good, and vice versa. The main part of the paper is the presentation of an improved method for the evolutionary search for the optimal design of ICs. The evolutionary approach considers scheduling and allocation constraints and ensures a globally optimal solution in a reasonable time. To evaluate our method we built an algorithm and implemented it with a computer. It was used over the group of test-bench ICs. They differ in size and the number of operation types. The results show that the evolutionary method is able to find a solution that is more appropriate in terms of all the considered and important parameters than is the case when working with classical deterministic methods.
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